Lam Research, IISc to commence pilot semiconductor engineering course

US-headquartered semiconductor component, engineering and services firm Lam Research announced its first pilot initiative for training semiconductor fabrication engineers in the country — unveiling a memorandum of understanding (MoU) with Indian Institute of Science (IISc) Bengaluru at Semicon India 2023 on Friday. The first tranche of 30 engineers at the institute’s Centre for Nano Science Engineering (CeNSE) will see the program commence next month.

Areas that the pilot project will focus on include virtual metrology or scientific measurements, physical design learning and process flow development, as part of device integration techniques for engineering students at IISc Bengaluru. The first stage of the project is scheduled to be completed by the end of this year, while a second stage is earmarked to be completed by June next year. Following the trial, the company will seek to align the program with engineering curriculum organised by the All India Council for Technical Education (AICTE), the central body responsible for engineering courses in the country.

On 23 June, Lam Research announced an initiative to train 60,000 semiconductor fabrication engineers in India over 10 years, in order to build a workforce to supply the chipmaking ecosystem. The initiative will use Lam Research’s Semiverse high-precision digital twin platform in order to offer the training, in partnership with technical education institutes and universities.

In a bid to develop engineering platforms for the chip designing and engineering industries, the company opened an engineering centre in Bengaluru in September last year.

Srinivasan Raghavan, chairperson, CeNSE at IISc Bengaluru, said in a statement that the project could help meet the target of developing 85,000 semiconductor engineers in the country by 2030, as envisaged by the Centre. He added that virtual platforms will play a key role in training chip engineers, since having a physical environment to train developing 2nm (nanometer) chips is “cost prohibitive for academic institutions”.

Lam Research’s announcement comes as fabless US chipmaker Advanced Micro Devices (AMD) announced a $400 million outlay to build its largest global engineering, research and development centre in India — with a target to hire 3,000 semiconductor designers by 2028. Anil Agarwal, chairman of domestic industrial conglomerate Vedanta, also said that the company has identified a new “world class” technology partner for its proposed semiconductor and display fabrication project — which ran into a roadblock earlier this month when the $19.5 billion joint-venture saw its technology partner, Taiwan’s Foxconn, exit the partnership.